SystemCoDesigner: System level design space exploration for embedded systems (SystemCoDesigner)

Exploration of Clock and Power Gating Tradeoffs for the Design of Self-Powering Dataflow Networks (2025) Karim A, Falk J, Teich J Conference contribution, Conference Contribution Self-Powering Dataflow Networks – Concepts and Implementation (2024) Karim A, Falk J, Schmidt D, Teich J Conference contribution, Conference Contribution Exploring Multi-Reader Buffers and Channel Placement during Dataflow Network Mapping to Heterogeneous Many-core Systems (2024) Letras M, Falk J, Teich J Journal article, Online publication Techniques for Efficient Performance Analysis and Memory Optimization in Mapping Dataflow Models of Computation onto Embedded Systems (2024) Letras M Thesis Throughput and Memory Optimization for Parallel Implementations of Dataflow Networks using Multi-Reader Buffers (2023) Letras M, Falk J, Teich J Conference contribution, Original article Decision Tree-based Throughput Estimation to Accelerate Design Space Exploration for Multi-Core Applications (2021) Letras M, Falk J, Teich J Conference contribution, Conference Contribution Multi-objective Optimization of Mapping Dataflow Applications to MPSoCs Using a Hybrid Evaluation Combining Analytic Models and Measurements (2020) Letras M, Falk J, Schwarzer T, Teich J Journal article, Original article Exploration of Power Domain Partitioning with Concurrent Task Mapping and Scheduling for Application-specific Multi-core SoCs (2020) Wang B, Glaß M, Falk J, Ahmed I, Teich J Conference contribution Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems (2019) Pourmohseni B, Smirnov F, Wildermann S, Teich J Conference contribution, Conference Contribution On the Analytic Evaluation of Schedules via Max-Plus Algebra for DSE of Multi-Core Architectures (2019) Letras M, Falk J, Schwarzer T, Teich J Conference contribution, Original article