Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Modeling and synthesis of hardware-software morphing (2007) Koch D, Haubelt C, Streichert T, Teich J Conference contribution, Conference Contribution Efficient hardware checkpointing: Concepts, overhead analysis, and implementation (2007) Koch D, Haubelt C, Teich J Conference contribution, Conference Contribution Actor-oriented modeling and simulation of sliding window image processing algorithms (2007) Keinert J, Falk J, Haubelt C, Teich J Conference contribution, Conference Contribution Schwach-programmiert macht stark (2007) Kissler D, Hannig F, Teich J Journal article The Erlangen Slot Machine: A Platform for Interdisciplinary Research in Reconfigurable Computing (2007) Angermeier J, Göhringer D, Majer M, Teich J, Fekete SP, Van Der Veen JC Journal article Efficient Control Generation for Mapping Nested Loop Programs onto Processor Arrays (2007) Dutta H, Hannig F, Ruckdeschel H, Teich J Journal article Dynamically Reconfigurable Architectures (2007) Bergmann N, Platzner M, Teich J Journal article A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation (2007) Teich J, Hannig F, Ruckdeschel H, Dutta H, Kissler D, Stravet A Conference contribution Optimal free-space management and routing-conscious dynamic placement for reconfigurable devices (2007) Ahmadinia A, Bobda C, Fekete SP, Teich J, Van Der Veen JC Journal article, Original article Massively Parallel Processor Architectures: A Co-design Approach (2007) Dutta H, Hannig F, Kupriyanov O, Kissler D, Teich J, Schaffer R, Siegel S, et al. Conference contribution