Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Digitale Hardware/Software-Systeme: Synthese und Optimierung (2007) Teich J, Haubelt C Authored book Scheduling and communication-aware mapping of HW-SW modules for dynamically and partially reconfigurable SoC architectures (2007) Angermeier J, Fekete SP, Göhringer D, Majer M, Teich J, Van Der Veen JC Conference contribution Concepts for Autonomic Integrated Systems (2007) Stechele W, Bringmann O, Ernst R, Herkersdorf A, Hojenski K, Janacik P, Rammig F, et al. Conference contribution Bitstream Decompression for High Speed FPGA Configuration from Slow Memories (2007) Koch D, Beckhoff C, Teich J Conference contribution Autonomic MPSoCs for Reliable Systems (2007) Stechele W, Bringmann O, Ernst R, Herkersdorf A, Hojenski K, Janacik P, Rammig F, et al. Conference contribution The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-Based Computer (2007) Bobda C, Majer M, Teich J, Ahmadinia A Journal article System Level Modeling and Performance Simulation for Dynamic Reconfigurable Computing Systems in SystemC (2007) Streubühr M, Riedel C, Haubelt C, Teich J Conference contribution Symbolic archive representation for a fast nondominance test (2007) Lukasiewycz M, Glaß M, Haubelt C, Teich J Conference contribution Solving multi-objective Pseudo-Boolean problems (2007) Lukasiewycz M, Glaß M, Haubelt C, Teich J Conference contribution SAT-decoding in evolutionary algorithms for discrete constrained optimization problems (2007) Lukasiewycz M, Glaß M, Haubelt C, Teich J Conference contribution, Conference Contribution