Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

A Communication Architecture for Complex Runtime Reconfigurable Systems and its Implementation on Spartan-3 FPGAs (2009) Koch D, Beckhoff C, Teich J Conference contribution CAN+: Techniques and Prototype for Achieving Increased Data Rates on the Basis of Common CAN Bus Structures (2009) Ziermann T, Teich J, Wildermann S Conference contribution Testfallgenerierung für SystemC-Designs mit abstrakten Modellbeschreibungen (2009) Gladigau J, Haubelt C, Streubühr M, Teich J, Schneider A, Knäblein J, Lindig M Conference contribution Data Flow Based System Level Design and Analysis of Concurrent Image Processing Applications (2009) Keinert J, Haubelt C, Teich J Conference contribution Hardware decompression techniques for FPGA-based embedded systems (2009) Teich J, Beckhoff C, Koch D Journal article, Original article Acceleration of multiresolution imaging algorithms: A comparative study (2009) Membarth R, Kutzer P, Dutta H, Hannig F, Teich J Conference contribution, Conference Contribution Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs (2009) Ziener D, Teich J Journal article AIS-Autonomous Integrated Systems (2009) Schöber V, Bringmann O, Herkersdorf A, Stechele W, Wehn N, May M, Ziener D, et al. Journal article System Level Performance Simulation for Heterogeneous Multi-Processor Architectures (2009) Streubühr M, Haubelt C, Teich J Conference contribution Symbolic scheduling of SystemC dataflow designs (2009) Gladigau J, Haubelt C, Teich J Book chapter / Article in edited volumes