Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Analysis of systemc actor networks for efficient synthesis (2010) Falk J, Zebelein C, Keinert J, Haubelt C, Teich J, Bhattacharyya SS Journal article, Original article Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications (2010) Platzner M, Teich J, Wehn N Authored book A self-organizing distributed reinforcement learning algorithm to achieve fair bandwidth allocation for priority-based bus communication (2010) Ziermann T, Mühleis N, Wildermann S, Teich J Conference contribution, Conference Contribution Echtzeitanalyse Ethernet-basierter E/E-Architekturen im Automobil (2010) Reimann F, Kern A, Haubelt C, Streichert T, Teich J Conference contribution A system-level synthesis approach from formal application models to generic bus-based MPSoCs (2010) Gladigau J, Gerstlauer A, Haubelt C, Streubühr M, Teich J Conference contribution, Conference Contribution Improving platform-based system synthesis by satisfiability Modulo theories solving (2010) Teich J, Haubelt C, Eberl M, Reimann F, Glaß M Conference contribution, Conference Contribution FPGA Implementation of an Invasive Computing Architecture (2009) Arifin F, Amouri A, Hannig F, Teich J Conference contribution From Model-based Design to Virtual Prototypes for Automotive Applications (2009) Streubühr M, Jäntsch M, Haubelt C, Teich J Conference contribution Efficient approximately-timed performance modeling for architectural exploration of MPSoCs (2009) Streubühr M, Gladigau J, Haubelt C, Teich J Conference contribution, Conference Contribution A communication architecture for complex runtime systems and its implementation on spartan-3 FPGAs (2009) Teich J, Beckhoff C, Koch D Conference contribution, Conference Contribution