Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

On robust task-accurate performance estimation (2013) Xu Y, Wang B, Hasholzner R, Rosales R, Teich J Conference contribution, Conference Contribution Virtual Networks - Distributed Communication Resource Management (2013) Heisswolf J, Zaib A, Weichslgartner A, König R, Wild T, Teich J, Herkersdorf A, Becker J Journal article FlexRay Static Segment Scheduling (2012) Lukasiewycz M, Glaß M, Teich J, Milbredt P Book chapter / Article in edited volumes Eine Aktor-Orientierte Methodik zur Power-Modellierung auf Systemebene (2012) Rosales R, Klie T, Glock S, Xu Y, Wang B, Hasholzner R, Teich J, Weigel R Journal article Hierarchical Power Management for Adaptive Tightly-Coupled Processor Arrays (2012) Lari V, Muddasani S, Boppu S, Hannig F, Schmid M, Teich J Journal article A Co-simulation Approach for System-Level Analysis of Embedded Control Systems (2012) Glaß M, Teich J, Zhang L Conference contribution Design of low power on-chip processor arrays (2012) Lari V, Muddasani S, Boppu S, Hannig F, Teich J Conference contribution, Conference Contribution Improving Performance of Controller Area Network (CAN) by Adaptive Message Scheduling (2012) Ziermann T, Salcic Z, Teich J Book chapter / Article in edited volumes FPGA-based Testbed for Timing Behavior Evaluation of the Controller Area Network (CAN) (2012) Ziermann T, Butiu A, Teich J, Ziener D Conference contribution Fast Architecture Evaluation of Heterogeneous MPSoCs by Host-Compiled Simulation (2012) Roloff S, Hannig F, Teich J Conference contribution