Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Adaptive Isolation for Predictable MPSoC Stream Processing (2015) Teich J Conference contribution Automatic Optimization of Hardware Accelerators for Image Processing (2015) Reiche O, Häublein K, Reichenbach M, Hannig F, Teich J, Fey D Conference contribution Throughput-optimizing compilation of dataflow applications for multi-cores using quasi-static scheduling (2015) Schwarzer T, Falk J, Glaß M, Teich J, Zebelein C, Haubelt C Conference contribution, Conference Contribution Symbolic Message Routing for Multi-Objective Optimization of Automotive E/E Architecture Component Platforms (2015) Graf S, Glaß M, Teich J Conference contribution Application-aware cross-layer reliability analysis and optimization (2015) Aliee H, Glaß M, Chen L, Ebrahimi M, Khosravi F, Kleeberger VB, Listl A, et al. Journal article Reconfigurable Buffer Structures for Coarse-Grained Reconfigurable Arrays (2015) Sousa É, Hannig F, Teich J Conference contribution Techniques for on-demand structural redundancy for massively parallel processor arrays (2015) Teich J, Lari V, Tanase AP, Witterauf M, Khosravi F, Meyer B Journal article, Original article Quasi-static scheduling of data flow graphs in the presence of limited channel capacities (2015) Falk J, Schwarzer T, Glaß M, Teich J, Zebelein C, Haubelt C Conference contribution, Conference Contribution On-demand fault-tolerant loop processing on massively parallel processor arrays (2015) Tanase AP, Witterauf M, Teich J, Hannig F, Lari V Conference contribution, Conference Contribution Importance measures in time-dependent reliability analysis and system design (2015) Aliee H, Borgonovo E, Glaß M, Teich J Conference contribution, Conference Contribution