Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Formal analysis of the startup delay of SOME/IP service discovery (2015) Seyler J, Streichert T, Glaß M, Navet N, Teich J Conference contribution, Conference Contribution Execution-driven parallel simulation of PGAS applications on heterogeneous tiled architectures (2015) Roloff S, Schafhauser D, Hannig F, Teich J Conference contribution, Conference Contribution Automatic communication-driven virtual prototyping and design for networked embedded systems (2015) Falk J, Schwarzer T, Zhang L, Glaß M, Teich J Journal article, Original article Adaptive fault tolerance through invasive computing (2015) Witterauf M, Tanase AP, Teich J, Lari V, Zwinkau A, Snelting G Conference contribution, Conference Contribution A co-design approach for fault-tolerant loop execution on Coarse-Grained Reconfigurable Arrays (2015) Lari V, Tanase AP, Teich J, Witterauf M, Khosravi F, Hannig F, Meyer B Conference contribution, Conference Contribution A co-design approach for accelerated SQL query processing via FPGA-based data filtering (2015) Becher A, Ziener D, Meyer-Wegener K, Teich J Conference contribution, Conference Contribution Uncertainty-aware reliability analysis and optimization (2015) Khosravi F, Müller M, Glaß M, Teich J Conference contribution, Conference Contribution Position Paper: Towards Hardware-Assisted Decentralized Mapping of Applications for Heterogeneous NoC Architectures. (2015) Weichslgartner A, Heißwolf J, Zaib A, Wild T, Herkersdorf A, Becker J, Teich J Conference contribution Robust Design of E/E Architecture Component Platforms (2015) Graf S, Reinhart S, Glaß M, Teich J, Platte D Conference contribution Approximate Adder Structures on FPGAs (2015) Becher A, Echavarria Gutiérrez JA, Ziener D, Teich J Conference contribution