Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Adaptive Isolation for Predictability and Security (2016) Mitra T, Teich J, Thiele L Edited Volume A Novel NoC-Architecture for Fault Tolerance and Power Saving (2016) Heißwolf J, Friederich S, Masing L, Weichslgartner A, Zaib A, Stein C, Duden M, et al. Conference contribution Position Paper: Towards Redundant Communication through Hybrid Application Mapping (2016) Weichslgartner A, Teich J Conference contribution HIPAcc (2016) Schmid M, Reiche O, Hannig F, Teich J Book chapter / Article in edited volumes A heterogeneous multi-core SoC for mixed criticality industrial automation systems (2016) Salcic Z, Nadeem M, Park H, Teich J Conference contribution A Novel Image Impulse Noise Removal Algorithm Optimized for Hardware Accelerators (2016) Bhadouria VS, Tanase AP, Schmid M, Hannig F, Teich J, Ghoshal D Journal article Hybrid Energy-Aware Reconfiguration Management on Xilinx Zynq SoCs (2016) Becher A, Pirkl J, Herrmann A, Teich J, Wildermann S Conference contribution Modeling, Programming and Performance Analysis of Automotive Environment Map Representations on Embedded GPUs (2016) Fickenscher J, Reiche O, Schlumberger J, Hannig F, Teich J Conference contribution Language and Compilation of Parallel Programs for *-Predictable MPSoC Execution using Invasive Computing (2016) Teich J, Glaß M, Roloff S, Schröder-Preikschat W, Snelting G, Weichslgartner A, Wildermann S Conference contribution Optimizing Latencies and Customizing NoC of Time-Predictable Heterogeneous Multi-Core Processor (2016) Salcic Z, Nadeem M, Park H, Teich J Conference contribution