Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Time-Critical Systems Design: A Survey (2018) Mitra T, Teich J, Thiele L Journal article Guest Editors’ Introduction: Special Issue on Time-Critical Systems Design (2018) Mitra T, Teich J, Thiele L Journal article Reinforcement Learning for Power-Efficient Grant Prediction in LTE (2018) Brand P, Falk J, Ah Sue J, Brendel J, Hasholzner R, Teich J Conference contribution, Original article A Predictive Dynamic Power Management for LTE-Advanced Mobile Devices (2018) Ah Sue J, Brand P, Brendel J, Hasholzner R, Falk J, Teich J Conference contribution, Conference Contribution Invasive Computing for Mapping Parallel Programs to Many-Core Architectures (2018) Weichslgartner A, Wildermann S, Glaß M, Teich J Authored book Environment Mapping Using Massively Parallel Architectures (2017) Fickenscher J, Bouzouraa ME, Hannig F, Teich J Conference contribution, Abstract of a poster Symbolic Multi-Level Loop Mapping of Loop Programs for Massively Parallel Processor Arrays (2017) Tanase AP, Witterauf M, Teich J, Hannig F Journal article, Original article High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera Systems (2017) Streit FJ, Letras M, Schid M, Falk J, Wildermann S, Teich J Conference contribution, Conference Contribution Generating FPGA-based Image Processing Accelerators with Hipacc (2017) Reiche O, Özkan MA, Membarth R, Teich J, Hannig F Conference contribution, Conference Contribution Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders (2017) Echavarria Gutiérrez JA, Wildermann S, Potwigin E, Teich J Journal article, Original article