Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Efficient Arithmetic Error Rate Calculus for Visibility Reduced Approximate Adders (2017) Echavarria Gutiérrez JA, Wildermann S, Potwigin E, Teich J Journal article, Original article System-Level Reliability Analysis Considering Imperfect Fault Coverage (2017) Khosravi F, Aliee H, Teich J Conference contribution, Conference Contribution Predictable Run-Time Mapping Reconfiguration for Real-Time Applications on Many-Core Systems (2017) Pourmohseni B, Wildermann S, Glaß M, Teich J Conference contribution, Conference Contribution A Highly Efficient and Comprehensive Image Processing Library for C++-based High-Level Synthesis (2017) Özkan MA, Reiche O, Hannig F, Teich J Conference contribution Hardware Design and Analysis of Efficient Loop Coarsening and Border Handling for Image Processing (2017) Özkan MA, Reiche O, Hannig F, Teich J Conference contribution Efficiency in ILP Processing by Using Orthogonality (2017) Brand M, Hannig F, Tanase AP, Teich J Conference contribution, Abstract of a poster Automatic Conversion of Simulink Models to SysteMoC Actor Networks (2017) Letras M, Falk J, Wildermann S, Teich J Conference contribution, Conference Contribution Auto-vectorization for Image Processing DSLs (2017) Reiche O, Kobylko C, Hannig F, Teich J Conference contribution, Conference Contribution Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures (2017) Khosravi F, Glaß M, Teich J Journal article, Original article A Scala Prototype to Generate Multigrid Solver Implementations for Different Problems and Target Multi-Core Platforms (2017) Köstler H, Schmitt C, Kuckuk S, Kronawitter S, Hannig F, Teich J, Rüde U, Lengauer C Journal article