Prof. Dr.-Ing. Jürgen Teich

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Configuration Tempering of BRAM-based AES Implementations on FPGAs (2018) Ziener D, Pirkl J, Teich J Conference contribution AConFPGA: A Multiple-Output Boolean Function Approximation DSE Technique Targeting FPGAs (2018) Echavarria Gutiérrez JA, Wildermann S, Teich J Conference contribution, Original article Integration of FPGAs in Database Management Systems: Challenges and Opportunities (2018) Becher A, Beena Gopalakrishnan Nair L, Broneske D, Drewes T, Gurumurthy B, Meyer-Wegener K, Pionteck T, et al. Journal article A Design-Time/Run-Time Application Mapping Methodology for Predictable Execution Time in MPSoCs (2018) Weichslgartner A, Wildermann S, Gangadharan D, Glaß M, Teich J Journal article Dynamic Resource Management for Heterogeneous Many-Cores (2018) Henkel J, Teich J, Wildermann S, Amrouch H Conference contribution On the Complexity of Mapping Feasibility in Many-Core Architectures (2018) Schwarzer T, Roloff S, Richthammer V, Khaldi R, Wildermann S, Glaß M, Teich J Conference contribution, Conference Contribution Design Space Exploration of Multi-output Logic Function Approximations (2018) Echavarria Gutiérrez JA, Wildermann S, Teich J Conference contribution, Original article Invasive Computing for Predictability of Multiple Non-functional Properties: A Cyber-Physical System Case Study (2018) Sousa É, Witterauf M, Brand M, Tanase AP, Hannig F, Teich J Conference contribution, Conference Contribution Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs (2018) Echavarria Gutiérrez JA, Schütz K, Becher A, Wildermann S, Teich J Conference contribution, Original article Optimistic Regular Expression Matching on FPGAs for Near-Data Processing (2018) Becher A, Wildermann S, Teich J Conference contribution, Conference Contribution