Architecture and Compiler Design

Approximate and Reconfigurable Precision Instruction Set Processors for Tightly Coupled Processor Arrays (2024) Brand M Thesis Hardware-Aware Evolutionary Filter Pruning (2022) Heidorn C, Meyerhöfer N, Schinabeck C, Hannig F, Teich J Conference contribution, Conference Contribution DyFiP: Explainable AI-based Dynamic Filter Pruning of Convolutional Neural Networks (2022) Sabih M, Hannig F, Teich J Conference contribution, Conference Contribution TRAC: Compilation-based Design of Transformer Accelerators for FPGAs (2022) Plagwitz P, Hannig F, Teich J Conference contribution, Conference Contribution Precision- and Accuracy-Reconfigurable Processor Architectures—An Overview (2022) Keszöcze O Journal article Performance Modeling and Parallelization of Environment Perception and Path Planning Algorithms for Heterogeneous Advanced Driver Assistance System Architectures (2020) Fickenscher J Thesis SYCL Code Generation for Multigrid Methods (2019) Groth S, Schmitt C, Teich J, Hannig F Conference contribution, Original article DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs (2019) Fickenscher J, Hannig F, Teich J Conference contribution, Original article Path Planning for Highly Automated Driving on Embedded GPUs (2018) Fickenscher J, Schmidt S, Hannig F, Bouzouraa ME, Teich J Edited Volume Solving Maxwell's Equations with Modern C++ and SYCL: A Case Study (2018) Afzal A, Schmitt C, Alhaddad S, Grynko Y, Teich J, Förstner J, Hannig F Conference contribution, Conference Contribution