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Synthesis strategies for sub-VT systems

Meinerzhagen P, Andersson O, Sherazi Y, Burg A, Rodrigues J (2011)

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Publication Type: Conference contribution

Publication year: 2011

Pages Range: 552-555

Conference Proceedings Title: 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011

Event location: SWE

ISBN: 9781457706189

DOI: 10.1109/ECCTD.2011.6043593

Abstract

Various synthesis strategies relying on conventional standard-cell libraries (SCLs) are evaluated in order to minimize the energy dissipation per operation in sub-threshold (sub-VT) systems. First, two sub-V T analysis methods are reviewed, both of which allow to evaluate the energy dissipation and performance in the sub-VT regime for designs which have been synthesized using a 65-nm CMOS SCL, characterized at nominal supply voltage. Both analysis methods are able to predict the energy minimum supply voltage (EMV) of any given design. Next, the results of a sub-V T synthesis at EMV using re-characterized SCLs are compared to the initial synthesis results. Finally, the results of timing-driven synthesis in both the above-VT and the sub-VT domain are compared to the results of power-driven synthesis. © 2011 IEEE.

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How to cite

APA:

Meinerzhagen, P., Andersson, O., Sherazi, Y., Burg, A., & Rodrigues, J. (2011). Synthesis strategies for sub-VT systems. In 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 (pp. 552-555). SWE.

MLA:

Meinerzhagen, Pascal, et al. "Synthesis strategies for sub-VT systems." Proceedings of the 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011, SWE 2011. 552-555.

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