IR-drop reduction in sub-VT circuits by de-synchronization

Karlsson A, Andersson O, Sparso J, Rodrigues JN (2012)

Publication Type: Conference contribution

Publication year: 2012

Conference Proceedings Title: 2012 IEEE Subthreshold Microelectronics Conference, SubVT 2012

Event location: USA

ISBN: 9781467315876

DOI: 10.1109/SubVT.2012.6404303

Abstract

This paper proposes IR-drop reduction of sub-VT circuits by de-synchronization. The de-synchronization concept is briefly demonstrated and analyzed by a case study. Extensive IR-drop analysis' of various technology options of a 65nm CMOS family demonstrate how the noise margins are reduced due to switching noise on the supply rails. It is shown that a de-synchronized implementation reduces severe voltage drops on the supply rails by approximately 50 %, compared to a clocked design. © 2012 IEEE.

Involved external institutions

Lund University / Lunds universitet SE Sweden (SE) Technical University of Denmark / Danmarks Tekniske Universitet (DTU) DK Denmark (DK)

How to cite

APA:

Karlsson, A., Andersson, O., Sparso, J., & Rodrigues, J.N. (2012). IR-drop reduction in sub-VT circuits by de-synchronization. In 2012 IEEE Subthreshold Microelectronics Conference, SubVT 2012. USA.

MLA:

Karlsson, Andreas, et al. "IR-drop reduction in sub-VT circuits by de-synchronization." Proceedings of the 2012 IEEE Subthreshold Microelectronics Conference, SubVT 2012, USA 2012.

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