Hardware efficient approximative matrix inversion for linear pre-coding in massive MIMO
Prabhu H, Edfors O, Rodrigues J, Liu L, Rusek F (2014)
Publication Type: Conference contribution
Publication year: 2014
Journal
Publisher: Institute of Electrical and Electronics Engineers Inc.
Pages Range: 1700-1703
Conference Proceedings Title: Proceedings - IEEE International Symposium on Circuits and Systems
Event location: AUS
ISBN: 9781479934324
DOI: 10.1109/ISCAS.2014.6865481
Abstract
This paper describes a hardware efficient linear precoder for Massive MIMO Base Stations (BSs) comprising a very large number of antennas, say, in the order of 100s, serving multiple users simultaneously. To avoid hardware demanding direct matrix inversions required for the Zero-Forcing (ZF) precoder, we use low complexity Neumann series based approximations. Furthermore, we propose a method to speed-up the convergence of the Neumann series by using tri-diagonal precondition matrices, which lowers the complexity even further. As a proof of concept a flexible VLSI architecture is presented with an implementation supporting matrix inversion of sizes up-to 16×16. In 65 nm CMOS, a throughput of 0.5M matrix inversions per sec is achieved at clock frequency of 420MHz with a 104K gate count. © 2014 IEEE.
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APA:
Prabhu, H., Edfors, O., Rodrigues, J., Liu, L., & Rusek, F. (2014). Hardware efficient approximative matrix inversion for linear pre-coding in massive MIMO. In Proceedings - IEEE International Symposium on Circuits and Systems (pp. 1700-1703). AUS: Institute of Electrical and Electronics Engineers Inc..
MLA:
Prabhu, Hemanth, et al. "Hardware efficient approximative matrix inversion for linear pre-coding in massive MIMO." Proceedings of the 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, AUS Institute of Electrical and Electronics Engineers Inc., 2014. 1700-1703.
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