A 65 nm single stage 28 fJ/cycle 0.12 to 1.2V level-shifter
Mohammadi B, Rodrigues JN (2014)
Publication Type: Conference contribution
Publication year: 2014
Journal
Publisher: Institute of Electrical and Electronics Engineers Inc.
Pages Range: 990-993
Conference Proceedings Title: Proceedings - IEEE International Symposium on Circuits and Systems
Event location: AUS
ISBN: 9781479934324
DOI: 10.1109/ISCAS.2014.6865304
Abstract
A conventional level-shifter is modified to extend the operation range down to subthreshold regime. Leakage current is reduced by utilizing transistor stacking, channel stretching, and reverse body biasing. The design has a standard-cell compliant layout and is fully integrated in a conventional digital design flow. The level-shifter is manufactured in 65nm CMOS, and functionality is verified by measurements. The proposed design is capable of converting 0.12 to 1.2V in a single stage, and has a static power consumption of 640pW at a 0.12 to 1V conversion. The minimum energy/cycle of 28 fJ/cycle with a conversion speed of 72MHz was observed at 0.3 to 1V conversion. © 2014 IEEE.
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APA:
Mohammadi, B., & Rodrigues, J.N. (2014). A 65 nm single stage 28 fJ/cycle 0.12 to 1.2V level-shifter. In Proceedings - IEEE International Symposium on Circuits and Systems (pp. 990-993). AUS: Institute of Electrical and Electronics Engineers Inc..
MLA:
Mohammadi, Babak, and Joachim Neves Rodrigues. "A 65 nm single stage 28 fJ/cycle 0.12 to 1.2V level-shifter." Proceedings of the 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, AUS Institute of Electrical and Electronics Engineers Inc., 2014. 990-993.
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