Investigation of CMOS Single Process Steps on 4H-SiC a-Plane Wafers for Quantum Applications

Schwarberg J, Karhu R, Kallinger B, Rommel M, Schmidt R, Schulze J (2024)

Publication Type: Conference contribution

Publication year: 2024

Publisher: Institute of Electrical and Electronics Engineers Inc.

Pages Range: 1566-1572

Conference Proceedings Title: 2024 47th ICT and Electronics Convention, MIPRO 2024 - Proceedings

Event location: Opatija HR

ISBN: 9798350382495

DOI: 10.1109/MIPRO60963.2024.10569589

Abstract

The crystal orientation of 4H-SiC a-plane (11-20) wafers allows efficient optical readout of silicon vacancies across the surface of the wafer. This sparks significant interest in utilizing a-plane wafers for quantum applications. Given the distinct properties of a-plane wafers compared to conventional c-plane (0001) wafers, well-established CMOS process steps require re-evaluation to ensure a fully functional CMOS process and comparable electrical properties. In epitaxial growth, the layer-by-layer growth on a-plane substrates leads to a smooth surface with a roughness of 0.08 nm. The incorporation of dopants is sevenfold increased, compared to c-plane substrates. For ion implantation on a-plane wafers, the 30° periodicity of (11-20) and (1-100) directions induces extended channeling, creating a 2D ion implantation profile with flanks in the ± 30° directions from the intended doping profile. For thermal oxidation a sixfold increased linear rate constant on a-plane wafers led to increased oxide growth rate in the reaction-limited regime.

Authors with CRIS profile

Jannik Schwarberg Lehrstuhl für Elektronische Bauelemente Jörg Schulze Lehrstuhl für Elektronische Bauelemente

Involved external institutions

Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie (IISB) DE Germany (DE)

How to cite

APA:

Schwarberg, J., Karhu, R., Kallinger, B., Rommel, M., Schmidt, R., & Schulze, J. (2024). Investigation of CMOS Single Process Steps on 4H-SiC a-Plane Wafers for Quantum Applications. In Snjezana Babic, Zeljka Car, Marina Cicin-Sain, Dragan Cisic, Pavle Ergovic, Tihana Galinac Grbac, Vera Gradisnik, Stjepan Gros, Andrej Jokic, Alan Jovic, Darko Jurekovic, Tihomir Katulic, Marko Koricic, Vedran Mornar, Juraj Petrovic, Karolj Skala, Dejan Skvorc, Vlado Sruk, Marko Svaco, Edvard Tijan, Neven Vrcek, Boris Vrdoljak (Eds.), 2024 47th ICT and Electronics Convention, MIPRO 2024 - Proceedings (pp. 1566-1572). Opatija, HR: Institute of Electrical and Electronics Engineers Inc..

MLA:

Schwarberg, Jannik, et al. "Investigation of CMOS Single Process Steps on 4H-SiC a-Plane Wafers for Quantum Applications." Proceedings of the 47th ICT and Electronics Convention, MIPRO 2024, Opatija Ed. Snjezana Babic, Zeljka Car, Marina Cicin-Sain, Dragan Cisic, Pavle Ergovic, Tihana Galinac Grbac, Vera Gradisnik, Stjepan Gros, Andrej Jokic, Alan Jovic, Darko Jurekovic, Tihomir Katulic, Marko Koricic, Vedran Mornar, Juraj Petrovic, Karolj Skala, Dejan Skvorc, Vlado Sruk, Marko Svaco, Edvard Tijan, Neven Vrcek, Boris Vrdoljak, Institute of Electrical and Electronics Engineers Inc., 2024. 1566-1572.

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