Si Esaki diodes with high peak to valley current ratios

Oehme M, Haehnel D, Werner J, Kaschel M, Kirfel O, Kasper E, Schulze J (2009)

Publication Type: Journal article

Publication year: 2009

Journal

Applied Physics Letters American Institute of Physics (AIP)

Book Volume: 95

Article Number: 242109

Journal Issue: 24

DOI: 10.1063/1.3274136

Abstract

We report room temperature current voltage characteristics of Si p+ -i-n+ Esaki diodes integrated on silicon substrates. The diodes were fabricated by low-temperature molecular beam epitaxy. Very high and abrupt p- and n-type dopant transitions into the 1020 cm-3 ranges are achieved by boron and antimony, respectively. The integrated devices are realized without a postgrowth annealing step. The silicon Esaki diodes show negative differential resistance at room temperature with excellent peak to valley current ratios up to 3.94. A variation in the thickness of the silicon tunneling barrier changes the peak current density over three orders of magnitude. © 2009 American Institute of Physics.

Involved external institutions

Universität Stuttgart DE Germany (DE)

How to cite

APA:

Oehme, M., Haehnel, D., Werner, J., Kaschel, M., Kirfel, O., Kasper, E., & Schulze, J. (2009). Si Esaki diodes with high peak to valley current ratios. Applied Physics Letters, 95(24). https://dx.doi.org/10.1063/1.3274136

MLA:

Oehme, Michael, et al. "Si Esaki diodes with high peak to valley current ratios." Applied Physics Letters 95.24 (2009).

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