Vertical Ge and GeSn heterojunction gate-all-around tunneling field effect transistors

Schulze J, Blech A, Datta A, Fischer IA, Haehnel D, Naasz S, Rolseth E, Tropper EM (2015)

Publication Type: Journal article

Publication year: 2015

Journal

Solid-State Electronics Elsevier

Book Volume: 110

Pages Range: 59-64

DOI: 10.1016/j.sse.2015.01.013

Abstract

We present experimental results on the fabrication and characterization of vertical Ge and GeSn heterojunction Tunneling Field Effect Transistors (TFETs). A gate-all-around process with mesa diameters down to 70 nm is used to reduce leakage currents and improve electrostatic control of the gate over the transistor channel. An ION = 88.4 μA/μm at VDS = VG = -2 V is obtained for a TFET with a 10 nm Ge0.92Sn0.08 layer at the source/channel junction. We discuss further possibilities for device improvements.

Authors with CRIS profile

Jörg Schulze

Involved external institutions

Universität Stuttgart DE Germany (DE)

How to cite

APA:

Schulze, J., Blech, A., Datta, A., Fischer, I.A., Haehnel, D., Naasz, S.,... Tropper, E.-M. (2015). Vertical Ge and GeSn heterojunction gate-all-around tunneling field effect transistors. Solid-State Electronics, 110, 59-64. https://doi.org/10.1016/j.sse.2015.01.013

MLA:

Schulze, Jörg, et al. "Vertical Ge and GeSn heterojunction gate-all-around tunneling field effect transistors." Solid-State Electronics 110 (2015): 59-64.

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