Das B, Sushama S, Schulze J, Ganguly U (2016)
Publication Type: Journal article
Publication year: 2016
Book Volume: 63
Pages Range: 4668-4673
Article Number: 7737023
Journal Issue: 12
Sub-0.6 V experimental demonstration of impact ionization (II) is a challenge in Si devices. We propose a new n+-i-δ-p+-i-n+ diode structure where II current is integrated as stored charge, which strongly affects the output current. The device was fabricated and measured current-voltage was compared with 'ideal' TCAD-based drift diffusion simulations to evaluate the excess over the barrier current due to impact ionization. Based on this study, impact ionization at 0.2-0.5 V over three orders of current is observed for the first time at room temperature (300 K) in Si. The temperature dependence of impact ionization observed is consistent with experimental and theoretical expectations from literature. Such low voltage impact ionization sustained over three orders of current at RT enables the feasibility of advanced computational devices.
APA:
Das, B., Sushama, S., Schulze, J., & Ganguly, U. (2016). Sub-0.2 V impact ionization in Si n-i-p-i-n diode. IEEE Transactions on Electron Devices, 63(12), 4668-4673. https://doi.org/10.1109/TED.2016.2620986
MLA:
Das, Bhaskar, et al. "Sub-0.2 V impact ionization in Si n-i-p-i-n diode." IEEE Transactions on Electron Devices 63.12 (2016): 4668-4673.
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