Exploiting hardware transactional memory in main-memory databases
Leis V, Kemper A, Neumann T (2014)
Publication Type: Conference contribution
Publication year: 2014
Publisher: IEEE Computer Society
Pages Range: 580-591
Conference Proceedings Title: Proceedings - International Conference on Data Engineering
ISBN: 9781479925544
DOI: 10.1109/ICDE.2014.6816683
Abstract
So far, transactional memory - although a promising technique - suffered from the absence of an efficient hardware implementation. The upcoming Haswell microarchitecture from Intel introduces hardware transactional memory (HTM) in mainstream CPUs. HTM allows for efficient concurrent, atomic operations, which is also highly desirable in the context of databases. On the other hand HTM has several limitations that, in general, prevent a one-to-one mapping of database transactions to HTM transactions. In this work we devise several building blocks that can be used to exploit HTM in main-memory databases. We show that HTM allows to achieve nearly lock-free processing of database transactions by carefully controlling the data layout and the access patterns. The HTM component is used for detecting the (infrequent) conflicts, which allows for an optimistic, and thus very low-overhead execution of concurrent transactions. © 2014 IEEE.
Authors with CRIS profile
Involved external institutions
Germany (DE)How to cite
APA:
Leis, V., Kemper, A., & Neumann, T. (2014). Exploiting hardware transactional memory in main-memory databases. In Proceedings - International Conference on Data Engineering (pp. 580-591). IEEE Computer Society.
MLA:
Leis, Viktor, Alfons Kemper, and Thomas Neumann. "Exploiting hardware transactional memory in main-memory databases." Proceedings of the 30th IEEE International Conference on Data Engineering, ICDE 2014 IEEE Computer Society, 2014. 580-591.
BibTeX: Download