Fischer D, Teich J, Thies M, Weper R (2003)
Publication Status: Published
Publication Type: Journal article, Original article
Publication year: 2003
Publisher: World Scientific Publishing
Book Volume: 12
Pages Range: 353-375
Journal Issue: 3
DOI: 10.1142/S0218126603000799
With the term Architecture/Compiler Co-exploration, we denote the problem of simultaneously optimizing an application-specific instruction set processor (ASIP) architecture as well as its generated compiler. In this paper, we characterize the design space of both compiler frontend (intermediate code optimization) and backend (changes of the machine model) and present the workflow of our framework BUILDABONG. The project consists of four phases: (a) architecture entry and composition, (b) automatic simulator generation, (c) compiler generation (in particular, retargeting), and (d) automatic architecture/compiler design space exploration. We demonstrate the feasibility of our approach by a detailed case study.
APA:
Fischer, D., Teich, J., Thies, M., & Weper, R. (2003). Buildabong: A framework for architecture/compiler co-exploration for ASIPs. Journal of Circuits Systems and Computers, 12(3), 353-375. https://doi.org/10.1142/S0218126603000799
MLA:
Fischer, Dirk, et al. "Buildabong: A framework for architecture/compiler co-exploration for ASIPs." Journal of Circuits Systems and Computers 12.3 (2003): 353-375.
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