Sousa É, Hannig F, Teich J, Schlichtmann U, Chen Q (2015)
Publication Status: Published
Publication Type: Conference contribution, Conference Contribution
Publication year: 2015
Publisher: Association for Computing Machinery, Inc
Pages Range: 121-124
Conference Proceedings Title: In Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES)
ISBN: 9781450335935
Massively Parallel Processor Arrays (MPPAs) can be nicely used in portable devices such as tablets and smartphones. However, applications running on mobile platforms require a certain performance level or quality (e.g., high-resolution image processing) that need to be satisfied while adhering to a certain power budget and temperature threshold. As a solution to the aforementioned challenges, we consider a resource-aware computing paradigm to exploit runtime adaptation without violating any thermal and/or power constraint in a programmable MPPA. For estimating the power consumption, we developed a mathematical model based on the post-synthesis implementation of an MPPA in different CMOS technologies while the temperature variation was emulated. We showcase our hardware/software mechanism to load new, on-the-fly configurations into the accelerator, considering quality/throughput tradeoffs for image processing applications. The results show that the average power consumption of a Sobel and Laplace operators using different number of processing elements amounts to 1.24mW and 10.35mW, respectively. Furthermore, only 1.64 μs are necessary for configuring a class of MPPA running at 550 MHz.
APA:
Sousa, É., Hannig, F., Teich, J., Schlichtmann, U., & Chen, Q. (2015). Runtime adaptation of application execution under thermal and power constraints in massively parallel processor arrays. In In Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 121-124). St. Goar, DE: Association for Computing Machinery, Inc.
MLA:
Sousa, Éricles, et al. "Runtime adaptation of application execution under thermal and power constraints in massively parallel processor arrays." Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, SCOPES 2015, St. Goar Association for Computing Machinery, Inc, 2015. 121-124.
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