Huemer M, Bichler D, Dorfmair W, Knauseder R, Osterkorn C, Lüftner T (2003)
Publication Type: Conference contribution
Publication year: 2003
Pages Range: 29-32
Conference Proceedings Title: Austrochip 2003
Event location: Linz, Austria
The dramatical increase of chipinternal data traffic in baseband processors for multimediaoriented mobile phones or PDAs requires highly sophisticated tools and simulation platforms, which allow to model and optimize the overall chip architecture in a convenient way. In this contribution we present a SystemC based simulation platform, which represents a basic and easy extensible model for simulation and optimization of FIFO buffer sizes, clock, bus and DMAconcepts. We briefly present the basic system model, the implementation with SystemC, and we also present simulation results of a simple test scenario.
APA:
Huemer, M., Bichler, D., Dorfmair, W., Knauseder, R., Osterkorn, C., & Lüftner, T. (2003). SystemC Modelling and Simulation of Highly Integrated Baseband ICs for 2.5th Generation Mobile Phones. In Austrochip 2003 (pp. 29-32). Linz, Austria.
MLA:
Huemer, Mario, et al. "SystemC Modelling and Simulation of Highly Integrated Baseband ICs for 2.5th Generation Mobile Phones." Proceedings of the Austrochip 2003, Linz, Austria 2003. 29-32.
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