Ahmadinia A, Bobda C, Ding J, Fekete SP, Majer M, Teich J, Van Der Veen JC (2005)
Publication Type: Conference contribution
Publication year: 2005
Publisher: Institute of Electrical and Electronics Engineers
Edited Volumes: Proceedings of the International Workshop on Rapid System Prototyping
Pages Range: 84-90
Conference Proceedings Title: Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping
Management of communication by on-line routing in new FPGAs with a large amount of logic resources and partial reconfigurability is a new challenging problem. A Network-on-Chip (NoC) typically uses packet routing mechanism, which has often unsafe data transfers, and network interface overhead. In this paper, circuit routing for such dynamic NoCs is investigated, and a practical 1-dimensional network with an efficient routing algorithm is proposed and implemented. Also, this concept has been extended to the 2-dimensional case. The implementation results show the low area overhead and high performance of this network. © 2005 IEEE.
APA:
Ahmadinia, A., Bobda, C., Ding, J., Fekete, S.P., Majer, M., Teich, J., & Van Der Veen, J.C. (2005). A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices. In Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (pp. 84-90). Montreal, CA: Institute of Electrical and Electronics Engineers.
MLA:
Ahmadinia, Ali, et al. "A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices." Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP), Montreal Institute of Electrical and Electronics Engineers, 2005. 84-90.
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