Jank M, Kandziora C, Frey L, Ryssel H (2006)
Publication Type: Conference contribution
Publication year: 2006
Publisher: American Institute of Physics
Edited Volumes: AIP Conference Proceedings
Pages Range: 121-124
Conference Proceedings Title: AIP Conference Proceedings Volume 866, Issue 1
Event location: Marseille
DOI: 10.1063/1.2401476
Modifications in the implantation sequence offer wide potential for simplification in integrated circuit manufacturing. We present a novel concept for a CMOS process with only three front-end mask layers for fabrication of bulk CMOS devices. Process and device simulations demonstrate the manufacturability and scalability of the presented approach. © 2006 American Institute of Physics.
APA:
Jank, M., Kandziora, C., Frey, L., & Ryssel, H. (2006). Well Design in a Bulk CMOS Technology with Low Mask Count. In AIP Conference Proceedings Volume 866, Issue 1 (pp. 121-124). Marseille: American Institute of Physics.
MLA:
Jank, Michael, et al. "Well Design in a Bulk CMOS Technology with Low Mask Count." Proceedings of the 2006 16th International Conference on Ion Implantation Technology, Marseille American Institute of Physics, 2006. 121-124.
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