Schäfer A, Fey D (2011)
Publication Type: Conference contribution
Publication year: 2011
Edited Volumes: Procedia Computer Science
Pages Range: 2027-2036
Conference Proceedings Title: Proceedings of the International Conference on Computational Science
Event location: Nanyang Technological University, Singapur
URI: http://www.libgeodecomp.org/archive/iccs2011_high_performance_stencil_code_algorithms_for_gpgpus.pdf
DOI: 10.1016/j.procs.2011.04.221
In this paper we investigate how stencil computations can be implemented on state-of-the-art general purpose graphics processing units (GPGPUs). Stencil codes can be found at the core of many numerical solvers and physical simulation codes and are therefore of particular interest to scientific computing research. GPGPUs have gained a lot of attention recently because of their superior floating point performance and memory bandwidth. Nevertheless, especially memory bound stencil codes have proven to be challenging for GPGPUs, yielding lower than to be expected speedups. We chose the Jacobi method as a standard benchmark to evaluate a set of algorithms on NVIDIA's latest Fermi chipset. One of our fastest algorithms is a parallel wavefront update. It exploits the enlarged on-chip shared memory to perform two time step updates per sweep. To the best of our knowledge, it represents the first successful application of temporal blocking for 3D stencils on GPGPUs and thereby exceeds previous results by a considerable margin. It is also the first paper to study stencil codes on Fermi. © 2011 Published by Elsevier Ltd.
APA:
Schäfer, A., & Fey, D. (2011). High Performance Stencil Code Algorithms for GPGPUs. In Proceedings of the International Conference on Computational Science (pp. 2027-2036). Nanyang Technological University, Singapur, SG.
MLA:
Schäfer, Andreas, and Dietmar Fey. "High Performance Stencil Code Algorithms for GPGPUs." Proceedings of the ICCS 2011, Nanyang Technological University, Singapur 2011. 2027-2036.
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