Design of a Highly Efficient CMOS Rectifier for Passive Communication Systems

Essel J, Brenk D, Heidrich J, Hofer G, Holweg G, Weigel R (2010)


Publication Type: Conference contribution

Publication year: 2010

Publisher: IEEE

Conference Proceedings Title: Asia-Pacific Microwave Conference (APMC)

Event location: Yokohama, Japan

ISBN: 978-1-4244-7590-2

URI: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5728485

Abstract

This paper presents the design of a highly efficient CMOS rectifier for passive communication systems. The integrated rectifier is implemented in a 0.13 μm CMOS technology. The measured overall RF-to-DC power conversion efficiency for a DC output power of 10 μW (1V and 10 μA) is about 25\%. The maximum efficiency for a DC output voltage of 1V is about 43\% at UHF and the efficiency of the rectifier at -15 dBm RF input power is still 20\%. This rectifier is using a self threshold cancelation technique to enhance the efficiency significantly.

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How to cite

APA:

Essel, J., Brenk, D., Heidrich, J., Hofer, G., Holweg, G., & Weigel, R. (2010). Design of a Highly Efficient CMOS Rectifier for Passive Communication Systems. In Asia-Pacific Microwave Conference (APMC). Yokohama, Japan: IEEE.

MLA:

Essel, Jochen, et al. "Design of a Highly Efficient CMOS Rectifier for Passive Communication Systems." Proceedings of the Asia-Pacific Microwave Conference (APMC), Yokohama, Japan IEEE, 2010.

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