Highly integrated fractional-n synthesizer for locatable wireless sensor nodes

Ußmüller T, Weigel R, Eickhoff R (2009)


Publication Type: Conference contribution

Publication year: 2009

Pages Range: 1-5

Conference Proceedings Title: IEEE International Conference on Communications

ISBN: 978-1-4244-3435-0

DOI: 10.1109/ICC.2009.5199053

Abstract

Local positioning systems significantly enhance the value of wireless sensor networks (WSN). This paper presents an integrated synthesizer for localization using frequency modulated continuous wave (FMCW) radar. The synthesizer is based on a fractional-n phase-locked loop (PLL) architecture. All components of the PLL are carefully designed with respect to their power consumption, and the digital parts are implemented in current-mode logic (CML). The complete synthesizer was manufactured in a 0.18 mum SiGe BiCMOS process from IBM, and it consumes only 100 mW, achieves a phase noise better than -117 dBc/Hz and has a silicon area of 1.15 mm2. Due to its high integration level and its optimized design, the synthesizer achieves low power consumption and low phase noise that make it suitable for precise localization in mobile sensor nodes. Localization measurements in indoor environments with multi- path propagation showed mean distance errors about 10 cm.

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How to cite

APA:

Ußmüller, T., Weigel, R., & Eickhoff, R. (2009). Highly integrated fractional-n synthesizer for locatable wireless sensor nodes. In IEEE International Conference on Communications (pp. 1-5).

MLA:

Ußmüller, Thomas, Robert Weigel, and Ralf Eickhoff. "Highly integrated fractional-n synthesizer for locatable wireless sensor nodes." Proceedings of the IEEE International Conference on Communications 2009. 1-5.

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