A 6ps Resolution Pulse Shrinking Time-to-Digital Converter as Phase Detector in Multi-Mode Transceiver

Liu Y, Vollenbruch U, Chen Y, Wicpalek C, Maurer L, Mayer T, Boos Z, Weigel R (2008)

Publication Type: Conference contribution

Publication year: 2008

Pages Range: 163-166

Conference Proceedings Title: IEEE Radio and Wireless Symposium

Event location: Orlando, FL

ISBN: 978-1-4244-1463-5

DOI: 10.1109/RWS.2008.4463454

Abstract

This paper presents a new phase detector in an all digital phase locked loop which converts the phase difference between one reference clock edge and one divided oscillator edge into a digital word. This digital word can be converted into a digital representation of the actual phase error which can be utilized in an all digital phase locked loop. 6 ps resolution for this time-to-digital converter (TDC) is realized in a standard 0.13 mum CMOS technology. Its full- scale-range (FSR) is 4500 ps.

Authors with CRIS profile

Robert Weigel Lehrstuhl für Technische Elektronik

Involved external institutions

Universität der Bundeswehr München DE Germany (DE)

How to cite

APA:

Liu, Y., Vollenbruch, U., Chen, Y., Wicpalek, C., Maurer, L., Mayer, T.,... Weigel, R. (2008). A 6ps Resolution Pulse Shrinking Time-to-Digital Converter as Phase Detector in Multi-Mode Transceiver. In IEEE Radio and Wireless Symposium (pp. 163-166). Orlando, FL.

MLA:

Liu, Yue, et al. "A 6ps Resolution Pulse Shrinking Time-to-Digital Converter as Phase Detector in Multi-Mode Transceiver." Proceedings of the IEEE Radio and Wireless Symposium, Orlando, FL 2008. 163-166.

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