A 0.13μm 1.5V CMOS I/Q Downconverter with Digital Adaptive IIP2 Calibration

Dufrene K, Boos Z, Weigel R (2007)


Publication Type: Conference contribution

Publication year: 2007

Pages Range: 86-589

Conference Proceedings Title: IEEE International Solid-State Circuits Conference

Event location: San Francisco, CA, USA

ISBN: 978-1-4244-0852-8

Abstract

A low-voltage I/Q downconverter with digital adaptive IIP2 calibration is presented. The system maintains high linearity over time by continuously updating tuning codes in response to varying operating conditions. A prototype is fabricated in a 0.13μm RF CMOS process. At 2GHz LO, it draws 48mA from a 1.5V supply

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How to cite

APA:

Dufrene, K., Boos, Z., & Weigel, R. (2007). A 0.13μm 1.5V CMOS I/Q Downconverter with Digital Adaptive IIP2 Calibration. In IEEE International Solid-State Circuits Conference (pp. 86-589). San Francisco, CA, USA.

MLA:

Dufrene, Krzysztof, Zdravko Boos, and Robert Weigel. "A 0.13μm 1.5V CMOS I/Q Downconverter with Digital Adaptive IIP2 Calibration." Proceedings of the IEEE International Solid-State Circuits Conference, San Francisco, CA, USA 2007. 86-589.

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