Symbol Data Organization in a WB-CDMA Modem
Hein W, Berkmann J, Zimmermann M, Huemer M (2007)
Publication Type: Conference contribution
Publication year: 2007
Pages Range: 12-15
Conference Proceedings Title: European Conference on Wireless Technologies
Event location: Munich, Germany
DOI: 10.1109/ECWT.2007.4403933
Abstract
For a System-on-Chip (SoC) implementation of mass market devices like a wireless modem user equipment it is crucial -in addition to fulfilling the standardized functional requirements -to optimize both silicon die size and power dissipation. In current VLSI technologies at 65 nm and beneath, beside an optimized logic implementation, a careful dimensioning of all memories is a must. This applies especially to those synchronous random access memories (SRAM) which have to be built on-die because the data throughput is inevitable high like in the signal processing part of a modem's physical layer. This paper presents as an example for the receive path of a WB-CDMA modem a solution for a low power data organization of the frame-wise buffered symbol-streams in between demodulators and channel decoder. This solution is self-adapting in real time to the permanent changing data rates and volume respectively.
Involved external institutions
Germany (DE)How to cite
APA:
Hein, W., Berkmann, J., Zimmermann, M., & Huemer, M. (2007). Symbol Data Organization in a WB-CDMA Modem. In European Conference on Wireless Technologies (pp. 12-15). Munich, Germany.
MLA:
Hein, Werner, et al. "Symbol Data Organization in a WB-CDMA Modem." Proceedings of the European Conference on Wireless Technologies, Munich, Germany 2007. 12-15.
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