17 GHz receiver in TSLP package for WLAN/ISM applications in 0.13 μm CMOS

Kienmayer C, Engl M, Desch A, Thüringer R, Berry M, Tiebot M, Scholtz A, Weigel R (2005)


Publication Type: Conference contribution

Publication year: 2005

Publisher: IEEE

Pages Range: 133-136

Conference Proceedings Title: Proceedings of the 31st European Solid-State Circuits Conference

Event location: Grenoble

ISBN: 978-0-7803-9205-2

DOI: 10.1109/ESSCIR.2005.1541577

Abstract

This work presents a fully integrated CMOS receiver in a leadless plastic package (TSLP) for high data rate WLAN applications at 17.2 GHz ISM band. The receiver offers a gain of 35 dB, input 1dB compression point of -49.6 dBm, SSB noise figure of 9.9 dB and an input IP3 of -39.8 dBm. At a power supply of 1.5 V, the receiver, which includes LNA, complex demodulator, VCO, IQ-divider and all RF-buffers, consumes only 245 mW.

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How to cite

APA:

Kienmayer, C., Engl, M., Desch, A., Thüringer, R., Berry, M., Tiebot, M.,... Weigel, R. (2005). 17 GHz receiver in TSLP package for WLAN/ISM applications in 0.13 μm CMOS. In Proceedings of the 31st European Solid-State Circuits Conference (pp. 133-136). Grenoble: IEEE.

MLA:

Kienmayer, C., et al. "17 GHz receiver in TSLP package for WLAN/ISM applications in 0.13 μm CMOS." Proceedings of the Proceedings of the 31st European Solid-State Circuits Conference, Grenoble IEEE, 2005. 133-136.

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