A new BIST scheme for low-power and high-resolution DAC testing

Li H, Eckmüller J, Sattler S, Eichfeld H, Weigel R (2003)

Publication Type: Journal article

Publication year: 2003

Journal

Advances in Radio Science : Kleinheubacher Berichte Copernicus Publications

Publisher: Copernicus

Book Volume: 1

Pages Range: 289-293

DOI: 10.5194/ars-1-289-2003

Abstract

A BIST scheme for testing on chip DAC is presented in this paper. We discuss the generation of on chip testing stimuli and the measurement of digital signals with a narrow-band digital filter. We validate the scheme with software simulation and point out the possibility of ADC BIST with verified DACicus-journals.

Authors with CRIS profile

Sebastian Sattler Lehrstuhl für Zuverlässige Schaltungen und Systeme Robert Weigel Lehrstuhl für Technische Elektronik

How to cite

APA:

Li, H., Eckmüller, J., Sattler, S., Eichfeld, H., & Weigel, R. (2003). A new BIST scheme for low-power and high-resolution DAC testing. Advances in Radio Science : Kleinheubacher Berichte, 1, 289-293. https://doi.org/10.5194/ars-1-289-2003

MLA:

Li, Hongzhi, et al. "A new BIST scheme for low-power and high-resolution DAC testing." Advances in Radio Science : Kleinheubacher Berichte 1 (2003): 289-293.

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