Significant on-resistance reduction of LDMOS devices by intermitted trench gates integration

Erlbacher T, Bauer AJ, Frey L (2012)

Publication Status: Published

Publication Type: Journal article, Original article

Publication year: 2012

Journal

IEEE Transactions on Electron Devices Institute of Electrical and Electronics Engineers (IEEE)

Publisher: Institute of Electrical and Electronics Engineers Inc.

Book Volume: 59

Pages Range: 3470-3476

Article Number: 6331001

Journal Issue: 12

DOI: 10.1109/TED.2012.2220777

Authors with CRIS profile

Lothar Frey Lehrstuhl für Elektronische Bauelemente

Involved external institutions

Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie (IISB) DE Germany (DE)

How to cite

APA:

Erlbacher, T., Bauer, A.J., & Frey, L. (2012). Significant on-resistance reduction of LDMOS devices by intermitted trench gates integration. IEEE Transactions on Electron Devices, 59(12), 3470-3476. https://doi.org/10.1109/TED.2012.2220777

MLA:

Erlbacher, Tobias, Anton J. Bauer, and Lothar Frey. "Significant on-resistance reduction of LDMOS devices by intermitted trench gates integration." IEEE Transactions on Electron Devices 59.12 (2012): 3470-3476.

BibTeX: Download