Co-Design of Massively Parallel Embedded Processor Architectures (CoMap)
Third party funded individual grant
Acronym:
CoMap
Start date :
01.01.2005
End date :
31.12.2011
Website:
https://www.cs12.tf.fau.de/forschung/projekte/comap
Output Serialization for FPGA-based and Coarse-grained Processor Arrays (2005)
Hannig F, Teich J
Conference contribution
Co-Design of Massively Parallel Embedded Processor Architectures (2005)
Dutta H, Hannig F, Kupriyanov O, Teich J, Schaffer R, Siegel S, Merker R, et al.
Conference contribution
Regular Mapping for Coarse-grained Reconfigurable Architectures (2004)
Hannig F, Dutta H, Teich J
Conference contribution
Dynamic Piecewise Linear/Regular Algorithms (2004)
Hannig F, Teich J
Conference contribution
Resource Constrained and Speculative Scheduling of an Algorithm Class with Run-Time Dependent Conditionals (2004)
Hannig F, Teich J
Conference contribution
Mapping of Regular Nested Loop Programs to Coarse-grained Reconfigurable Arrays -- Constraints and Methodology (2004)
Hannig F, Dutta H, Teich J
Conference contribution
Resource Constrained and Speculative Scheduling of Dynamic Piecewise Regular Algorithms (2004)
Hannig F, Teich J
Other publication type
