Co-Design of Massively Parallel Embedded Processor Architectures (CoMap)

Third party funded individual grant

Acronym: CoMap

Start date : 01.01.2005

End date : 31.12.2011

Website: https://www.cs12.tf.fau.de/forschung/projekte/comap

Overview

Publications

(47)

Efficient Control Generation for Mapping Nested Loop Programs onto Processor Arrays (2007) Dutta H, Hannig F, Ruckdeschel H, Teich J Journal article A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation (2007) Teich J, Hannig F, Ruckdeschel H, Dutta H, Kissler D, Stravet A Conference contribution Massively Parallel Processor Architectures: A Co-design Approach (2007) Dutta H, Hannig F, Kupriyanov O, Kissler D, Teich J, Schaffer R, Siegel S, et al. Conference contribution A Formal Methodology for Hierarchical Partitioning of Piecewise Linear Algorithms (2006) Dutta H, Hannig F, Teich J Other publication type Hardware cost analysis for weakly programmable processor arrays (2006) Kissler D, Hannig F, Kupriyanov O, Teich J Conference contribution, Conference Contribution MAML - An Architecture Description Language for Modeling and Simulation of Processor Array Architectures, Part I (2006) Kupriyanov O, Hannig F, Kissler D, Schaffer R, Teich J Other publication type Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays: Architectural Parameters and Methodology (2006) Dutta H, Hannig F, Teich J Journal article Controller Synthesis for Mapping Partitioned Programs on Array Architectures (2006) Dutta H, Hannig F, Teich J Conference contribution Mapping of Nested Loop Programs onto Massively Parallel Processor Arrays with Memory and I/O Constraints (2006) Dutta H, Hannig F, Teich J Conference contribution Hierarchical Partitioning for Piecewise Linear Algorithms (2006) Dutta H, Hannig F, Teich J Conference contribution

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