Co-Design of Massively Parallel Embedded Processor Architectures (CoMap)

Third party funded individual grant

Acronym: CoMap

Start date : 01.01.2005

End date : 31.12.2011

Website: https://www.cs12.tf.fau.de/forschung/projekte/comap

Overview

Publications

(47)

Scheduling Techniques for High-Throughput Loop Accelerators (2009) Hannig F Thesis MAML: An ADL for Designing Single and Multiprocessor Architectures (2008) Kupriyanov O, Hannig F, Kissler D, Teich J Book chapter / Article in edited volumes Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism (2008) Schaffer R, Merker R, Hannig F, Teich J Conference contribution The PAULA Language for Designing Multi-Dimensional Dataflow-Intensive Applications (2008) Hannig F, Ruckdeschel H, Teich J Conference contribution Optimization of Routing and Reconfiguration Overhead in Programmable Processor Array Architectures (2008) Wolinski C, Kuchcinski K, Teich J, Hannig F Conference contribution Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures (2008) Wolinski C, Kuchcinski K, Teich J, Hannig F Conference contribution Area and Reconfiguration Time Minimization of the Communication Network in Regular 2D Reconfigurable Architectures (2008) Wolinski C, Kuchcinski K, Teich J, Hannig F Conference contribution Power-efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures (2008) Kissler D, Strawetz A, Hannig F, Teich J Conference contribution Modeling of interconnection networks in massively parallel processor architectures (2007) Kupriyanov O, Hannig F, Kissler D, Teich J, Lallet J, Sentieys O, Pillement S Conference contribution Efficient event-driven simulation of parallel processor architectures (2007) Kupriyanov O, Kissler D, Hannig F, Teich J Conference contribution, Conference Contribution

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