Design methodology for embedded system made upon small networks of hardware reconfigurable nodes and connections (ReCoNets)

Third Party Funds Group - Sub project


Acronym: ReCoNets

Start date : 01.06.2003

End date : 31.05.2009

Website: http://www.reconets.de

close-button

Types of publications

Journal article
Book chapter / Article in edited volumes
Authored book
Translation
Thesis
Edited Volume
Conference contribution
Other publication type
Unpublished / Preprint

Publication year

From
To

Abstract

Journal

Bitstream Decompression for High Speed FPGA Configuration from Slow Memories (2007) Koch D, Beckhoff C, Teich J Conference contribution The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-Based Computer (2007) Bobda C, Majer M, Teich J, Ahmadinia A Journal article Modeling and synthesis of hardware-software morphing (2007) Koch D, Haubelt C, Streichert T, Teich J Conference contribution, Conference Contribution Efficient hardware checkpointing: Concepts, overhead analysis, and implementation (2007) Koch D, Haubelt C, Teich J Conference contribution, Conference Contribution Dynamically Reconfigurable Architectures (2007) Bergmann N, Platzner M, Teich J Journal article An operating system infrastructure for fault-tolerant reconfigurable networks (2006) Koch D, Streichert T, Dittrich S, Strengert C, Haubelt C, Teich J Conference contribution Dynamically Reconfigurable Architectures (2006) Becker J, Teich J, Athanas P, Brebner G Edited Volume Multi-objective topology optimization for networked embedded systems (2006) Streichert T, Haubelt C, Teich J Conference contribution, Conference Contribution Dynamic task binding for hardware/software reconfigurable networks (2006) Streichert T, Strengert C, Haubelt C, Teich J Conference contribution, Conference Contribution Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems (2006) Koch D, Streichert T, Teich J, Haubelt C Journal article
‹ 1 2 3 4 5 ›