PD Dr.-Ing. Frank Hannig

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Hierarchical Partitioning for Piecewise Linear Algorithms (2006) Dutta H, Hannig F, Teich J Conference contribution Communication-conscious Mapping of Regular Nested Loop Programs onto Massively Parallel Processor Arrays (2006) Hannig F, Merker R, Siegel S, Teich J Conference contribution A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing (2006) Dutta H, Hannig F, Heigl B, Hornegger H, Teich J Conference contribution A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template (2006) Kissler D, Hannig F, Kupriyanov O, Teich J Conference contribution A highly parameterizable parallel processor array architecture (2006) Kissler D, Kupriyanov O, Hannig F, Teich J Conference contribution, Conference Contribution Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays -- Architectural Parameters and Methodology (2006) Hannig F, Dutta H, Teich J Journal article A Generic Framework for Rapid Prototyping of System-on-Chip Designs (2006) Kissler D, Kupriyanov O, Hannig F, Koch D, Teich J Conference contribution An Architecture Description Language for Massively Parallel Processor Architectures (2006) Kupriyanov O, Hannig F, Kissler D, Teich J, Schaffer R, Merker R Conference contribution Modeling of Interconnection Networks in Massively Parallel Processor Architectures (2006) Kupriyanov O, Hannig F, Kissler D, Teich J, Lallet J, Sentieys O, Pillement S Other publication type Using symbolic feasibility tests during design space exploration of heterogeneous multi-processor systems (2005) Schlichter T, Hannig F, Haubelt C, Teich J Conference contribution, Conference Contribution