PD Dr.-Ing. Frank Hannig

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Area and Reconfiguration Time Minimization of the Communication Network in Regular 2D Reconfigurable Architectures (2008) Wolinski C, Kuchcinski K, Teich J, Hannig F Conference contribution Power-efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures (2008) Kissler D, Strawetz A, Hannig F, Teich J Conference contribution Domain-Specific Reconfigurable MPSoC-Systems - Challenges and Trends (2008) Dutta H, Hannig F, Kissler D, Teich J Conference contribution Modeling of interconnection networks in massively parallel processor architectures (2007) Kupriyanov O, Hannig F, Kissler D, Teich J, Lallet J, Sentieys O, Pillement S Conference contribution Efficient event-driven simulation of parallel processor architectures (2007) Kupriyanov O, Kissler D, Hannig F, Teich J Conference contribution, Conference Contribution Schwach-programmiert macht stark (2007) Kissler D, Hannig F, Teich J Journal article Efficient Control Generation for Mapping Nested Loop Programs onto Processor Arrays (2007) Dutta H, Hannig F, Ruckdeschel H, Teich J Journal article A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation (2007) Teich J, Hannig F, Ruckdeschel H, Dutta H, Kissler D, Stravet A Conference contribution Massively Parallel Processor Architectures: A Co-design Approach (2007) Dutta H, Hannig F, Kupriyanov O, Kissler D, Teich J, Schaffer R, Siegel S, et al. Conference contribution A Formal Methodology for Hierarchical Partitioning of Piecewise Linear Algorithms (2006) Dutta H, Hannig F, Teich J Other publication type