PD Dr.-Ing. Frank Hannig

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

System Integration of Tightly-Coupled Reconfigurable Processor Arrays and Evaluation of Buffer Size Effects on Their Performance (2009) Lari V, Hannig F, Teich J Conference contribution Parallelization Approaches for Hardware Accelerators - Loop Unrolling versus Loop Partitioning (2009) Hannig F, Dutta H, Teich J Conference contribution Optimization Flow for Algorithm Mapping on Graphics Cards (2009) Membarth R, Hannig F, Dutta H, Teich J Conference contribution FSM-Controlled Architectures for Linear Invasion (2009) Arifin F, Membarth R, Amouri A, Hannig F, Teich J Conference contribution Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors (2009) Membarth R, Hannig F, Dutta H, Teich J Conference contribution Acceleration of multiresolution imaging algorithms: A comparative study (2009) Membarth R, Kutzer P, Dutta H, Hannig F, Teich J Conference contribution, Conference Contribution Model-based synthesis and optimization of static multi-rate image processing algorithms (2009) Keinert J, Dutta H, Hannig F, Haubelt C, Teich J Conference contribution, Conference Contribution Scheduling Techniques for High-Throughput Loop Accelerators (2009) Hannig F Thesis MAML: An ADL for Designing Single and Multiprocessor Architectures (2008) Kupriyanov O, Hannig F, Kissler D, Teich J Book chapter / Article in edited volumes Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism (2008) Schaffer R, Merker R, Hannig F, Teich J Conference contribution