PD Dr.-Ing. Frank Hannig

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Frameworks for GPU Accelerators: A Comprehensive Evaluation using 2D/3D Image Registration (2011) Membarth R, Hannig F, Teich J, Körner M, Eckert W Conference contribution Towards Symbolic Run-Time Reconfiguration in Tightly-Coupled Processor Arrays (2011) Boppu S, Hannig F, Teich J, Pérez-Andrade R Conference contribution Distributed Resource Reservation in Massively Parallel Processor Arrays (2011) Lari V, Hannig F, Teich J Conference contribution Detector Defect Correction of Medical Images on Graphics Processors (2011) Membarth R, Hannig F, Teich J, Litz G, Hornegger H Conference contribution Resource-Aware Programming and Simulation of MPSoC Architectures through Extension of X10 (2011) Hannig F, Roloff S, Snelting G, Teich J, Zwinkau A Conference contribution Efficient Evaluation of Power/Area/Latency Design Trade-offs for Coarse-Grained Reconfigurable Processor Arrays (2011) Kissler D, Hannig F, Teich J Journal article Proceedings of the 22nd IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP) (2011) Cavallaro JR, Ercegovac MD, Hannig F, Ienne P, Swartzlander Jr. EE, Tenca AF Edited Volume Scalable Many-Domain Power Gating in Coarse-grained Reconfigurable Processor Arrays (2011) Kissler D, Gran D, Salcic Z, Hannig F, Teich J Journal article Proc. 21st IEEE International Conference on Application-specific Systems, Architectures, and Processors (2010) Charot F, Hannig F, Teich J, Wolinski C Edited Volume Compilation Techniques for CGRAs: Exploring All Parallelization Approaches (2010) Vander Aa T, Raghavan P, Mahlke S, De Sutter B, Shrivastava A, Hannig F Conference contribution