PD Dr.-Ing. Frank Hannig

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

On-demand fault-tolerant loop processing on massively parallel processor arrays (2015) Tanase AP, Witterauf M, Teich J, Hannig F, Lari V Conference contribution, Conference Contribution Loop Coarsening in C-based High-Level Synthesis (2015) Schmid M, Reiche O, Hannig F, Teich J Conference contribution, Conference Contribution Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) (2015) Hannig F, Fey D, Lokhmotov A Edited Volume Symbolic loop parallelization for balancing I/O and memory accesses on processor arrays (2015) Tanase AP, Witterauf M, Hannig F, Teich J Conference contribution, Conference Contribution Resource-awareness on heterogeneous MPSoCs for image processing (2015) Paul J, Stechele W, Oechslein B, Erhardt C, Schedel J, Lohmann D, Schröder-Preikschat W, et al. Journal article, Original article Application-driven reconfiguration of shared resources for timing predictability of MPSoC platforms (2015) Gangadharan D, Sousa É, Lari V, Hannig F, Teich J Conference contribution, Conference Contribution Invasive computing for predictable stream processing: A simulation-based case study (2015) Roloff S, Wildermann S, Hannig F, Teich J Conference contribution, Conference Contribution Towards a Performance-portable Description of Geometric Multigrid Algorithms using a Domain-specific Language (2014) Membarth R, Reiche O, Schmitt C, Hannig F, Teich J, Stürmer M, Köstler H Journal article Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs (2014) Schmid M, Reiche O, Schmitt C, Hannig F, Teich J Conference contribution Experiments on Optimizing the Performance of Stencil Codes with SPL Conqueror (2014) Grebhahn A, Kuckuk S, Schmitt C, Köstler H, Siegmund N, Apel S, Hannig F, Teich J Journal article