Hritam Dutta

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Acceleration of multiresolution imaging algorithms: A comparative study (2009) Membarth R, Kutzer P, Dutta H, Hannig F, Teich J Conference contribution, Conference Contribution Model-based synthesis and optimization of static multi-rate image processing algorithms (2009) Keinert J, Dutta H, Hannig F, Haubelt C, Teich J Conference contribution, Conference Contribution Quantitative Evaluation of Behavioral Synthesis Approaches for Reconfigurable Devices (2008) Dutta H, Hannig F, Ruckdeschel H, Teich J Conference contribution PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications (2008) Hannig F, Ruckdeschel H, Dutta H, Teich J Conference contribution Domain-Specific Reconfigurable MPSoC-Systems - Challenges and Trends (2008) Dutta H, Hannig F, Kissler D, Teich J Conference contribution Efficient Control Generation for Mapping Nested Loop Programs onto Processor Arrays (2007) Dutta H, Hannig F, Ruckdeschel H, Teich J Journal article A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation (2007) Teich J, Hannig F, Ruckdeschel H, Dutta H, Kissler D, Stravet A Conference contribution Massively Parallel Processor Architectures: A Co-design Approach (2007) Dutta H, Hannig F, Kupriyanov O, Kissler D, Teich J, Schaffer R, Siegel S, et al. Conference contribution A Formal Methodology for Hierarchical Partitioning of Piecewise Linear Algorithms (2006) Dutta H, Hannig F, Teich J Other publication type Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays: Architectural Parameters and Methodology (2006) Dutta H, Hannig F, Teich J Journal article