Dr.-Ing. Marc Reichenbach

Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design (2021) Vaas S, Ulbrich P, Eichler C, Wägemann P, Reichenbach M, Fey D Conference contribution, Conference Contribution Transparent FPGA Acceleration with TensorFlow (2021) Pfenning S, Holzinger P, Reichenbach M Conference contribution, Conference Contribution Fast HBM Access with FPGAs: Analysis, Architectures, and Applications (2021) Holzinger P, Reiser D, Hahn T, Reichenbach M Conference contribution, Conference Contribution A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories (2020) Knödtel J, Fritscher M, Reiser D, Fey D, Breiling M, Reichenbach M Conference contribution, Conference Contribution Impact of Performance Estimation on Fast Processor Simulators (2020) Rachuj S, Fey D, Reichenbach M Conference contribution, Conference Contribution Simulating memristive systems in mixed-signal mode using commercial design tools (2019) Fritscher M, Knödtel J, Reichenbach M, Fey D Conference contribution A Hardware Inference Accelerator for Temporal Convolutional Networks (2019) Ali R, Mallah M, Leyh M, Holzinger P, Breiling M, Reichenbach M, Fey D Conference contribution, Conference Contribution Optimizing Multi-State Reliability in ReRAM Arrays using an Automated Device Selection Method (2019) Peschel J, Knödtel J, Pérez E, Reichenbach M, Wenger C, Fey D Conference contribution, Abstract of lecture Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications (2019) Bauer W, Holzinger P, Rachuj S, Häublein K, Reichenbach M, Fey D Conference contribution, Conference Contribution Utilizing PYNQ for Accelerating Image Processing Functions in ADAS Applications (2019) Häublein K, Brückner W, Vaas S, Rachuj S, Reichenbach M, Fey D Conference contribution