Eidgenössische Technische Hochschule Zürich (ETHZ) / Swiss Federal Institute of Technology in Zurich
University / College
Location:
Zürich,
Switzerland (CH)
ISNI: 0000000121562780
ROR: https://ror.org/05a28rw58
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CodeSign: An Embedded System Design Environment (1998)
Esser R, Teich J, Thiele L
Journal article
Rapid Prototyping of Dataflow Programs on Hardware/Software Architectures (1998)
Eisenring M, Teich J, Thiele L
Conference contribution
Representation of Process Mode Correlation for Scheduling (1998)
Ernst R, Richter K, Teich J, Thiele L, Ziegenbein D
Conference contribution
System-Level Synthesis Using Evolutionary Algorithms (1998)
Blickle T, Teich J, Thiele L
Journal article
An Evolutionary Approach to System-Level Synthesis (1997)
Blickle T, Teich J, Thiele L
Conference contribution
Proc. IEEE Int. Conference on Application Specific Systems, Architectures, and Processors (ASAP´97) (1997)
Fortes J, Noll T, Taylor V, Teich J, Thiele L, Vissers K
Edited Volume
Performance Analysis of Mixed Asynchronous-Synchronous Systems (1997)
Martin M, Sriram S, Teich J, Thiele L
Journal article
Partitioning Processor Arrays under Resource Constraints (1997)
Teich J, Thiele L, Zhang L
Journal article
System-level synthesis using evolutionary algorithms (1996)
Teich J, Thiele L
Other publication type, Technical Report
A new approach to solving resource-constrained scheduling problems based on a flow-model (1996)
Teich J, Thiele L
Other publication type, Technical Report