Lehrstuhl für Informatik 3 (Rechnerarchitektur)

A Non-Volatile Flip-Flop Using Memristive Voltage Divider (2017) Biglari M, Fey D Conference contribution, Abstract of a poster Memory Analysis and Performance Modeling for HPC Applications on Embedded Hardware via Instruction Accurate Simulation (2017) Ditter A, Schönwetter D, Kuzmin A, Fey D, Aizinger V Conference contribution, Conference Contribution Fe2vCl2: From Bare Metal to High Performance Computing on Virtual Clusters and Cloud Infrastructure (2017) Ditter A, Graf G, Fey D Conference contribution, Conference Contribution Reproducibility report: Team SegFAUlt @ SCC 2016 (2017) Ditter A, Laukemann J, Oehlrich B Journal article Comprehensive curriculum for reconfigurable heterogeneous computer architecture education (2017) Pfundt B, Reichenbach M, Fey D Journal article LibHSA: One Step Towards Mastering the Era of Heterogeneous Hardware Accelerators using FPGAs (2017) Reichenbach M, Holzinger P, Häublein K, Lieske T, Blinzer P, Fey D Conference contribution A fast general purpose CPU utilizing signed-digit encoding and multi-bit memristors (2017) Wust D, Söll C, Fey D Conference contribution Prototyping Memristors in Digital Systems with an FPGA-Based Testing Environment (2017) Wust D, Biglari M, Knödtel J, Reichenbach M, Söll C, Fey D Conference contribution, Original article Memristive Voltage Divider: A Bipolar ReRAM-based Unit for Non-Volatile Flip-Flops (2017) Biglari M, Fey D Conference contribution, Original article An Image Processing Operator Language for Design and Synthesis of Smart Camera Architectures (2017) Hartmann C, Häublein K, Pfundt B, Reichenbach M, Fey D Conference contribution