Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)

Hardware cost analysis for weakly programmable processor arrays (2006) Kissler D, Hannig F, Kupriyanov O, Teich J Conference contribution, Conference Contribution Stochastic Timing Analysis of Communicating Tasks with Internal State (2006) Teich J Other publication type A Flexible Reconfiguration Manager for the Erlangen Slot Machine (2006) Majer M, Ahmadinia A, Bobda C, Teich J Conference contribution MAML - An Architecture Description Language for Modeling and Simulation of Processor Array Architectures, Part I (2006) Kupriyanov O, Hannig F, Kissler D, Schaffer R, Teich J Other publication type Modeling and analysis of windowed synchronous algorithms (2006) Keinert J, Haubelt C, Teich J Conference contribution, Conference Contribution Dynamic task binding for hardware/software reconfigurable networks (2006) Streichert T, Strengert C, Haubelt C, Teich J Conference contribution, Conference Contribution Mapping a Class of Dependence Algorithms to Coarse-grained Reconfigurable Arrays: Architectural Parameters and Methodology (2006) Dutta H, Hannig F, Teich J Journal article Modeling and Design of Fault-Tolerant and Self-Adaptive Reconfigurable Networked Embedded Systems (2006) Koch D, Streichert T, Teich J, Haubelt C Journal article Approximationsalgorithmen - Eine Einführung (2006) Wanka R Authored book, Textbook Task-accurate performance modeling in SystemC for real-time multi-processor architectures (2006) Streubühr M, Falk J, Teich J, Haubelt C, Dorsch R, Schlipf T Conference contribution, Conference Contribution